Many electronic devices such as desktop computers, laptop computers, tablets and smart phones employ integrated and/or discrete semiconductor memory devices to store information. These semiconductor memory devices fall into either volatile or non-volatile categories. Volatile memories lose stored information when power is removed, while non-volatile memories retain their stored information even when power is removed. Volatile memories include random access memory (RAM), which is further divided into subcategories including static random access memory (SRAM) and dynamic random access memory (DRAM).
A typical DRAM memory cell has only one transistor and one capacitor, so it provides a high degree of integration for bulk information storage; however, DRAM requires constant refreshing and its slow speed tends to limit DRAM to computer main memories. On the other hand, an SRAM cell design, such as a 4 transistor design (4T) or a 6 transistor design (6T), uses more transistors to make the SRAM cell bi-stable, meaning that the SRAM cell maintains a binary output state indefinitely, as long as adequate power is supplied. While SRAM has a lower degree of integration than DRAM, SRAM can operate at a higher speed and with lower power dissipation than DRAM, so computer cache memories tend to use SRAMs. Other SRAM applications include embedded memories and networking equipment memories. While SRAM is often selected over DRAM when faster performance is important, even faster SRAM performance is desirable.
It is not uncommon for SRAM transistors, such as SRAM transistors included in a memory cell array, to be implemented on the same integrated circuit as other transistor types used, for example, for logic or input/output (IO) circuitry. However, the design rules for SRAM transistors are typically different from (e.g., tighter than) the design rules used for typical logic/IO transistors. Because SRAM design rules are tighter, SRAM transistors are typically smaller than logic/IO transistors. A typical logic/IO transistor therefore takes up more space on an integrated circuit than a typical SRAM transistor. In addition, when SRAM transistors are implemented on the same integrated circuit as logic/IO transistors having different design rules, the logic/IO transistors are typically separated from the SRAM transistors on the integrated circuit by a buffer area, requiring additional space on the integrated circuit.